Error while compiling simulation sources using ModelSim

[Skazza94]

Hi everyone,
I am trying to compile open-nic-shell simulation sources for ModelSim, following the instructions in the readme file.
I am new to FPGA programming, so I do not know what I am doing wrong or if I am missing some steps.

First, I run the following command in the script path:

vivado -mode tcl -source ./build.tcl -tclargs \
  -board au280 \
  -num_cmac_port 2 -num_phys_func 2 \
  -sim 1 \
  -sim_lib_path /mnt/xilinx/compile_simlib \
  -sim_exec_path /mnt/modelsim/modelsim_dlx/linuxpe \
  -sim_top p2p_250mhz

After this finishes, I end up with a Vivado shell that I quit:

Then I follow the next steps to run ModelSim:

# The path to the build
cd /mnt/xilinx/open-nic/open-nic-shell/build/au280_test_syn_term_bit/open_nic_shell/open_nic_shell.sim/sim_1/behav/modelsim

# Simlinks as described in the readme
ln -s /mnt/xilinx/open-nic/open-nic-shell/script/tb/* ./
ln -s /mnt/xilinx/open-nic/open-nic-shell/plugin/p2p/box_250mhz/tb/* ./

# Compile the simulation sources using modelsim
./compile.sh

However, the compile.sh command fails with the following errors:

In text:

** Error: ../../../../../../../src/system_config/cms_subsystem.sv(67): (vlog-2730) Undefined variable: 'satellite_gpio_0'.
** Error: ../../../../../../../src/system_config/cms_subsystem.sv(67): (vlog-13294) Identifier must be declared with a port mode: satellite_gpio_0.
** Error: ../../../../../../../src/open_nic_shell.sv(494): (vlog-2730) Undefined variable: 'pcie_rxp'.
** Error: ../../../../../../../src/open_nic_shell.sv(495): (vlog-2730) Undefined variable: 'pcie_rxn'.
** Error: ../../../../../../../src/open_nic_shell.sv(496): (vlog-2730) Undefined variable: 'pcie_txp'.
** Error: ../../../../../../../src/open_nic_shell.sv(497): (vlog-2730) Undefined variable: 'pcie_txn'.

Checking open_nic_shell.sv file, the variables pcie_* are defined. So, I don't understand such errors.

Software versions:

• ModelSim Deluxe 2024.2
• Xilinx Vivado 2023.1

Thanks in advance for the help!