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[SYCL][E2E] Guard CRI TBX env vars behind tbx param#22765

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againull wants to merge 1 commit into
intel:syclfrom
againull:cri_tbx
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[SYCL][E2E] Guard CRI TBX env vars behind tbx param#22765
againull wants to merge 1 commit into
intel:syclfrom
againull:cri_tbx

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@againull
againull requested a review from a team as a code owner July 25, 2026 00:39
Comment on lines +2 to +10
config.environment["NEOReadDebugKeys"] = "1"
config.environment["ProductFamilyOverride"] = "cri"
config.environment["HardwareInfoOverride"] = "1x8x8"
config.environment["SetCommandStreamReceiver"] = "2"
config.environment["RebuildPrecompiledKernels"] = "1"
config.environment["EnableDirectSubmission"] = "0"
config.environment["EnableBlitterOperationsSupport"] = "1"
config.environment["BlitterEnableMaskOverride"] = "6"
config.environment["Enable64BitAddressing"] = "1"

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Instead of explicitly setting these variables, why don't we just propagate them from the host environment? https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/lit.cfg.py#L119

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